A Computational Temporal Logic for Superconducting Accelerators
Session: Exotic architectures--Keep architecture weird!
Authors: Georgios Tzimpragos (University of California, Santa Barbara); Dilip Vasudevan (Lawrence Berkeley National Laboratory); Nestan Tsiskaridze (University of California, Santa Barbara); George Michelogiannakis (Lawrence Berkeley National Laboratory); Advait Madhavan (National Institute of Standards and Technology & University of Maryland); Jennifer Volk (University of California, Santa Barbara); John Shalf (Lawrence Berkeley National Laboratory); Timothy Sherwood (University of California, Santa Barbara)
Superconducting logic offers the potential to perform computation at tremendous speeds and energy savings. However, a ``semantic gap'' lies between the level-driven logic that traditional hardware designs accept as a foundation and the pulse-driven logic that is naturally supported by the most compelling superconducting technologies. A pulse, unlike a level signal, will fire through a channel for only an instant. Arranging the network of superconducting components so that input pulses always arrive simultaneously to ``logic gates'' to maintain the illusion of Boolean-only evaluation is a significant engineering hurdle. In this paper, we explore computing in a new and more native tongue for superconducting logic: time of arrival. Building on recent work in delay-based computations we show that superconducting logic can naturally compute directly over temporal relationships between pulse arrivals, that the computational relationships between those pulse arrivals can be formalized through a functional extension to a temporal predicate logic used in the verification community, and that the resulting architectures can operate asynchronously and describe real and useful computations. We verify our hypothesis through a combination of detailed analog circuit models, a formal analysis of our abstractions, and an evaluation in the context of several superconducting accelerators.